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40 lines
718 B
40 lines
718 B
4 years ago
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{ stdenv
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, fetchFromGitHub
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, bison
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, flex
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, verilog
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}:
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stdenv.mkDerivation rec {
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pname = "vhd2vl";
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version = "unstable-2018-09-01";
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src = fetchFromGitHub {
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owner = "ldoolitt";
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repo = pname;
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rev = "37e3143395ce4e7d2f2e301e12a538caf52b983c";
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sha256 = "17va2pil4938j8c93anhy45zzgnvq3k71a7glj02synfrsv6fs8n";
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};
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nativeBuildInputs = [
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bison
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flex
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];
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buildInputs = [
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verilog
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];
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installPhase = ''
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mkdir -p $out/bin
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cp src/vhd2vl $out/bin/
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'';
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meta = with stdenv.lib; {
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description = "VHDL to Verilog converter";
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homepage = "https://github.com/ldoolitt/vhd2vl";
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license = licenses.gpl2Plus;
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maintainers = with maintainers; [ matthuszagh ];
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};
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}
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