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54 lines
1.1 KiB
54 lines
1.1 KiB
{ lib, stdenv
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, fetchFromGitHub
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, bison
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, flex
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, verilog
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, which
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}:
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stdenv.mkDerivation rec {
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pname = "vhd2vl";
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version = "unstable-2018-09-01";
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src = fetchFromGitHub {
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owner = "ldoolitt";
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repo = pname;
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rev = "37e3143395ce4e7d2f2e301e12a538caf52b983c";
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sha256 = "17va2pil4938j8c93anhy45zzgnvq3k71a7glj02synfrsv6fs8n";
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};
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patches = lib.optionals (!stdenv.isAarch64) [
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# fix build with verilog 11.0
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./test.patch
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];
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nativeBuildInputs = [
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bison
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flex
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which
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];
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buildInputs = [
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verilog
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];
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# the "translate" target both (a) builds the software and (b) runs
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# the tests (without validating the results)
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buildTargets = [ "translate" ];
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# the "diff" target examines the test results
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checkTarget = "diff";
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installPhase = ''
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runHook preInstall
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install -D -m755 src/vhd2vl $out/bin/vdh2vl
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runHook postInstall
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'';
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meta = with lib; {
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description = "VHDL to Verilog converter";
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homepage = "https://github.com/ldoolitt/vhd2vl";
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license = licenses.gpl2Plus;
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maintainers = with maintainers; [ matthuszagh ];
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};
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}
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